Universal Micro-Processor Based Interlocking System UMBIS

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The development of railway automation systems involves replacing existing relay systems with the microelectronic computer systems to control the movement of trains.

The microprocessor–based interlocking systems (MBIS) — a set of devices, providing route setting, route locking and route releasing at the station as well as testing of the execution of the required interdependencies.

Currently, MBIS technology is the modern and one of the most popular mean of the rolling stock movement control all around the world.

The first priority goal of the MBIS development and integration is to reach a new level of safety and efficient operation of the rolling stock.

SYSTEM FUNCTION

The UMBIS system performs all relevant functions of traffic control on the base of microprocessor technology and using the software level to control signaling arrangement at the station limits and on running lines. The basic principle of setting down the hardware is to get the maximum possible routing controls.

The UMBIS system is intended to:

  • enable the transmission of enable transmission of diagnostic information to the higher-level systems
  • extend the functional capabilities and efficiency of the operational staff
  • reduce cost and the capacity of installation works
  • shorten the maintenance time for signaling arrangement as well as recover time in the case of equipment damages or failures

PERFORMANCE CAPABILITIES

  • Comply with the European (CENELEC SIL4) and other international safety standards.
  • High availability: use of standard industrial modules, hardware and software are tested at the factory, the fully tested and debugged equipment is delivered on the premises.
  • The modular design concept: the ability to increase the number of managed objects.
  • Distant control of signals and points with the help of intelligent object controllers.
  • Advanced system diagnostics: to detect pre-failure conditions of the equipment.
  • Redundancy protection of principle system’s components.
  • Possibility to set down the equipment both centralized and decentralized way.

SYSTEM ARCHITECTURE

UMBIS System Architecture

CONTROL EQUIPMENT LEVEL (AWP)

The UMBIS system structure is modular, meaning hardware and software complex can be reconfigured in the case some changes take place at the station.

Control equipment level (AWP) includes main and redundant AWP of the station operator and the mechanic’s AWP. AWPs are intended to display the automation objects’ states in the readable mnemonic diagram of the station, provide command input, inform a station operator and a mechanic of usual and unusual events, display diagnostics data, archive events.

To ensure system’s information resources are preserved and confidential, the access to the AWPs is restricted and authorized, so that making unauthorized changes of system operation is impossible.

INTERLOCKING CONTROLLERS LEVEL (IC)

Interlocking controllers level (IC) is build on the redundancy scheme “2 of 3” unresisted. Each channel of the interlocking controller IC1, IC2, IC3 is equipped with:

  • galvanically isolated power-supply and control circuits;
  • independent power sources.

On the IC level based on the received data, technological control algorithms are applied to the station objects shaping and generating the control inputs. If necessary, the station operator can receive service notification to explain the results of the control flow.

OBJECT CONTROLLERS LEVEL (OC)

Object controllers level (ОC) consists of object-oriented dedicated controllers, that manage wayside equipment of points and traffic lights. All controllers have a safe structure "2 of 3", and in the case of the data fit in the microprocessor, the commands are given to the wayside devices via digital connection. Each OC has its own unique address that is assigned to hit by encoding mounting seats. Shifting between the same mission-oriented Ocs of does not affect the performance of the whole MBIS system.

CONSTRUCTION

UMBIS is a system where the equipment is usually set down centrally and arranged into constructions to provide easy and comfortable installation and operation, access to all replaceable units and control units.

Structurally, the level of the ICs and the OCs is mounted on the 19-inch rack «МЕК 297» (overall dimensions 2070×645×608 mm).

The racks mounting is performed by the plant manufacturer without soldering.

The construction of the MBIS system elements is designed to consider the worst operating conditions and the processes that damage structural materials (corrosion, erosion, aging, wearing, etc.).

INTEGRATION

UMBIS can be integrated with relay station and running line systems, with microprocessor automation systems, with field equipment that is authorized for operation.

UMBIS has a user friendly interface and does not require additional devices to connect with related control systems: power supply system, trains speed control system, etc.

ADVANTAGES OF IMPLEMENTATION

Adaptability. The offered solutions allow easy and quick adaption of the system for use on the main and industrial railway transport lines and underground depots.

Safety. Safety of micro-processor based interlocking system is achieved by the means of hardware redundancy (MBIS controllers, interface loops) and the use of the control policy «2 of 2» or «2 of 3», which means the executive of objects are activated only if appropriate commands are duplicated at the both outputs of the system’s channels.

To avoid dangerous situations caused by the accumulation of failures in the control computer complex constant monitoring is carried out to check the information identity in the channels of the computer system.

To prevent unauthorized access, operation staff should authorize with the personal password to change the shift.

Reliability. Reliability of the MBIS is provided by hot redundancy of all nodes of the system and structural redundancy of communication channels.

Continuous monitoring and diagnostics of microelectronic devices’ state ensures timely detection and troubleshooting of pre-failure conditions.

The system features an effective surge protection, minimizing the impact of external interference on the microprocessor device.